Last updated on May 26th, 2022 at 05:29 am

This post covers the **Asynchronous modulus counter** with the help of a set of frequently asked questions (FAQs) and answers.

- What does it mean by the term modulus of a counter?
- What do you mean by the term truncated binary counters?
- Give one example of a truncated binary counter.
- What is a BCD decade counter?
- Give one application area where the BCD decade counter is used?
- How many flip-flops are required to implement a decade counter?
- What is partial decoding used in designing of modulus counter?
- What is a glitch in truncated counters?
- How many states will be there in a mod-6 counter?
- What do you mean by the term ‘MOD number’ of any counter?
- A MOD-10 counter is known as a divide-by-10 counter –Why?
- Related posts (for further study) on Binary Counter

## What does it mean by the term **modulus **of a counter?

The **modulus **of a counter is the number of unique states through which the counter will sequence. The maximum possible number of states (maximum modulus) of a counter is 2^{n },^{ }where *n *is the number of flip-flops in the counter.

**What do you mean by the term truncated binary counters?**

Counters can be designed to have a number of states in their sequence that is less than the maximum of **2**^{n }**,** where *n *is the number of flip-flops required to design the counter. This type of sequence in the counter is called a * truncated sequence* and the counters are termed as

**truncated**binary counters.

**Give one example of a truncated binary counter**.

One common example of a **truncated binary counter** is a **Decade Counter **with a** **truncated sequence of ten (called MOD 10) i.e. count sequence of zero (0000) through nine (1001).

**What is a BCD decade counter?**

A decade counter** (**called** MOD 10) **with a count sequence of zero (0000) through nine (1001) is a BCD decade counter because its ten-state sequence produces the BCD code.

**Give one application area where the BCD decade counter is used?**

BCD decade counter is useful in display applications in which BCD is required for conversion to a decimal readout.

**How many flip-flops are required to implement a decade counter?**

A decade counter requires four flip-flops (three flip-flops are insufficient because 2 ^{3 }= 8).

**What is partial decoding used in designing of modulus counter?**

Notice in Figure 1(a) that only *Q*1 and *Q*3 are connected to the NAND gate inputs. This arrangement is an example of **partial decoding***, *in which the two unique states (*Q*1 = 1 and *Q*3 = 1) are sufficient to decode the count of ten because none of the other states (zero through nine) have both *Q*1 and *Q*3 HIGH at the same time. When the counter goes into count ten (1010), the decoding gate output goes LOW and asynchronously resets (clear) all the flip-flops.

**What is a glitch in truncated counters?**

In a truncated sequence counter, the transitional states produce undesired voltage spikes of short duration (glitches) on the outputs of a decoder connected to the counter.

This unwanted spike of voltage is known as a glitch.

## How many states will be there in a mod-6 counter?

There will be **six states** in a mod-6 counter. This means the counter goes through the counting sequence from 000 to 101 in each complete cycle before it recycles back to its starting state.

## What do you mean by the term ‘MOD number’ of any counter?

The **MOD number **of any counter is generally equal to the number of states that the counter goes through in each complete cycle before it recycles back to its starting state.

## A MOD-10 counter is known as a *divide-by-10 counter* –Why?

In a MOD-10 (decade) counter the signal output from the last FF (i.e., the MSB) will have a frequency of 1/10 the input clock frequency; so it is known as a *divide-by-10 counter.*

## Related posts (for further study) on Binary Counter

**Asynchronous Counter – study & revision notes**

**Synchronous Counter – Study & Revision Notes**

**How to design a Synchronous counter – step by step guide**

**2-bit Synchronous Binary Counter using J-K flip-flops**

**A 3-Bit Asynchronous Binary Counter – Up Counter**

**Asynchronous Up counter for Positive & Negative edge-triggered flip-flops**

**Binary Counter Sequential Circuit – FAQs**

**Frequently Asked Questions on Flip-Flops Sequential Circuit**

**Numerical problems on asynchronous counter & synchronous counter**

**J-K flip-flop – Frequently asked questions for semester & GATE exam**

**Modulus-M (MOD-M) asynchronous counter – Study and revision notes**

**Digital Electronics – Hub page**

**Author of this post**

This post is co-authored by *Professor Saraswati Saha*, who is an assistant professor at RCCIIT, a renowned degree engineering college in India. Professor Saha teaches subjects related to digital electronics & microprocessors.