PhysicsTeacher.in

High School Physics + more

Memory Mapped IO and IO Mapped IO in 8085 microprocessor

In this post, we will study Memory-mapped I/O and Peripheral-mapped I/O (i.e., IO Mapped IO) scheme, and find out differentiating features of these two schemes.

There are generally two addressing schemes for I/O devices in a 8085 microprocessor based system.

  • Memory-mapped I/O and
  • I/O mapped I/O or Peripheral-mapped I/O.

Memory-mapped I/O scheme – features

  • Each input device or output device is treated as a memory-location.
  • Each input device or output device is identified by a unique 16-bit address, similar to the 16-bit memory address assigned to a memory location.
  • The control signals MEMR’ and MEMW’ are used to activate input devices and output devices, respectively.
  • All the memory-related data transfer instructions used to read data from memory such as LDA 2000H, LDAX B and MOV A,M can be used to access input devices.
  • All the memory-related data transfer instructions used to write data into memory such as STA 3000H, STAX D and MOV M,A can be used to send data to output devices.
  • Since the I/O devices use some memory address space of the 8085, the maximum memory capacity is lesser than 64kB in this method.

I/O mapped I/O scheme – features

  • I/O devices are not treated as memory device.
  • Each input device or output device is identified by a unique 8-bit address, assigned to it.
  • The control signals IOR’ and IOW’ are used to activate input devices and output devices, respectively.
  • The IN instruction is used to access input devices and the OUT instruction to access output devices.
  • Since the control signals used to access input devices and output devices are different , and all I/O devices use 8-bit addresses, a maximum of 256 (=28) input devices and 256 output devices can be interfaced with the 8085.
  • Since the I/O devices use separate memory address space, the 8085 can access 64kB memory space in this method.

Role of I/O/M’ control signal during the accessing of input output devices.

The address, on the address bus may refer either to a memory location or to an I/O device that will be separated by the control signal I/O/M’. An active low on this signal shows it is a memory operation (I/O/M’=0) and a high on this line indicates an I/O operation (I/O/M’=1).

Address range for input /output devices in I/O mapped I/O scheme

In 8085, input /output devices can have address in the range 00-FFH in I/O mapped I/O addressing scheme.

Address range for input /output devices in memory mapped I/O scheme

In 8085, input /output devices can have address in the range 0000H to FFFFH in memory-mapped I/O addressing scheme.

Author of this post

This post is co-authored by Professor Saraswati Saha, who is an assistant professor at RCCIIT, a renowned degree engineering college in India. Professor Saha teaches subjects related to digital electronics & microprocessors.

See also  Branching instructions in 8085 Microprocessor & their types
Scroll to top
error: physicsTeacher.in