7476 TTL is a commercially used JK flip flop based IC. The logic symbol and the truth table for the commercial 7476 TTL JK flip flop are shown in Fig.1(a) & (b).
7476 IC Logic Symbol | 7476 Truth Table
Added to the symbol are two asynchronous inputs (preset and clear). The synchronous inputs are the J and K data and clock inputs. The customary normal (Q) and complementary (Q’) outputs are also shown.
A detailed truth table for the commercial 7476 JK flip flops is drawn in Fig. 1(b).
Here the asynchronous inputs (such as PS and CLR) override synchronous inputs. The asynchronous inputs are activated in the first three lines of the truth table. The synchronous inputs are irrelevant (overridden) in the first three lines in Fig. 1(b); therefore, an X is placed under the J, K, and CLK inputs for these rows. The prohibited state occurs when both asynchronous inputs are activated at the same time. The prohibited state is not useful and should be avoided.
When both asynchronous inputs (PS and CLR) are disabled with a 1, the synchronous inputs can be activated. The bottom four lines of the truth table in Fig. 1(b) detail the hold, reset, set, and toggle modes of operation for the 7476 J-K flip-flop.